By Theoharis Theoharis
This publication is the results of the learn within the implementation of polygon-based photographs operations on definite normal function parallel processors; the purpose is to supply a speed-up over sequential implementations of the pix operations involved, and the ensuing software program might be seen as a subset of the applying suites of the suitable parallel machines. A literature assessment and a short description of the architectures thought of provide an creation into the sphere. so much algorithms are constantly offered in an informally outlined extension of the Occam language which include unmarried guide a number of information circulation (SIMD) facts forms and operations on them. unique tools for polygon rendering - together with the operations of filling, hidden floor removing and soft shading - are awarded for SIMD architectures just like the DAP and for a dual-paradigm (SIMD-MIMD) computer built out of a DAP-like processor array and a transputer community. Polygon clipping algorithms for either transputer and the DAP are defined and contrasted. except the knowledge awarded within the publication and the beneficial literature survey, the reader may also anticipate to realize an perception into the programming of the suitable parallel machines.
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Extra info for Algorithms for Parallel Polygon Rendering
Ixlxfd There are two main ways of mapping an NxN PE's [Redd88]. memories of the PE's. (I/N)-l. For example to distribute a 512x512 frame buffer among the memories of a 32x32 processor array using sheet mapping, we divide the frame buffer into 256 blocks of 32x32 pixels and 23 assign one pixel of every block to the memory of the "corresponding" PE (there are Conversely, in crinkled mapping the frame 32×32 PE's and 32×32 pixels in each block). buffer is divided into contiguous blocks and each block is allocated to the memory of a single PE.
22 the AMT DAP). e. consist purpose processors (the DAP approach is such an example). Processor arrays memories. do Indeed, if the applications justify it, processor arrays could be constructed out of bit-parallel PE's and memories. e. one that has M-bit From now on we shall assume an N×N×M processor array wide PE data N x N × M sized object in parallel. bit -serial of bit-serial PE's and bit-wide processor, like the paths and can process all the elements of an We shall extend the performance figures of an efficient DAP, to the 31) case.
G. The filling the MIMD be concerned with this Chapter, polygon the will refer to a convex polygon. 1. I n c r e m e n t a l Polygon A convex n-sided polygon can be regarded as the intersection of n half planes defined by its n Filling Algorithm sides (including the sides themselves) or, alternatively, as the convex hull of its n vertices. 1. 1). 1. Extent of a polygon 2. For each window of the extent, find the intersection of the n half planes within the window. This identifies the pixels of the window that are actually covered by the polygon.